Logic drive using standard commodity programmable logic ic chips comprising non-volatile random access memory cells
US-2024380401-A1 · Nov 14, 2024 · US
US8971103B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8971103-B2 |
| Application number | US-201313799587-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 13, 2013 |
| Priority date | Mar 13, 2013 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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A technique is provided for a thermally assisted magnetoresistive random access memory device. The device has a synthetic antiferromagnetic layer disposed on an antiferromagnetic layer. The synthetic antiferromagnetic layer has a first ferromagnetic storage layer, a non-magnetic coupling layer disposed on the first ferromagnetic storage layer, and a second ferromagnetic storage layer disposed on the non-magnetic coupling layer. A non-magnetic tunnel barrier is disposed on the second ferromagnetic storage layer, and a ferromagnetic sense layer is disposed on the non-magnetic tunnel barrier. A first ferromagnetic critical temperature of the first ferromagnetic storage layer is higher than an antiferromagnetic critical temperature of the antiferromagnetic layer, is higher than a second ferromagnetic critical temperature of the second ferromagnetic storage layer, and is higher than a third ferromagnetic critical temperature of the ferromagnetic sense layer.
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What is claimed is: 1. A thermally assisted magnetoresistive random access memory device, comprising: an antiferromagnetic layer; a synthetic antiferromagnetic layer disposed on the antiferromagnetic layer, wherein the synthetic antiferromagnetic layer comprises a first ferromagnetic storage layer, a non-magnetic coupling layer disposed on the first ferromagnetic storage layer, and a second ferromagnetic storage layer disposed on the non-magnetic coupling layer; a non-magnetic…
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