Systems, methods, and devices for pulse amplitude modulated charging
US-2024405592-A1 · Dec 5, 2024 · US
US8971076B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8971076-B2 |
| Application number | US-201213366623-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 6, 2012 |
| Priority date | Feb 8, 2011 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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A first error amplification circuit amplifies a difference between a predetermined reference voltage and a first detection voltage that corresponds to the output voltage of a DC/DC converter, so as to generate a second voltage. A voltage level judgment circuit generates a third voltage having a discrete level that corresponds to the amplitude of a first voltage. A multiplying/dividing circuit multiplies the first voltage by the second voltage, and divides the resulting product by the third voltage, so as to generate a fourth voltage. A comparator compares the fourth voltage with a second detection voltage that corresponds to a current that flows through a switching transistor included in the DC/DC comparator. A driving circuit turns on the switching transistor for each predetermined period, and turns off the switching transistor according to the output of the comparator every time the second detection voltage becomes higher than the fourth voltage.
Opening claim text (preview).
What is claimed is: 1. A control circuit for a power factor correction circuit that comprises a DC/DC converter, the control circuit comprising: an input voltage detection terminal configured to receive a first voltage having a full-wave rectified waveform; a first error amplification circuit configured to amplify a difference between a predetermined reference voltage and a first detection voltage that corresponds to an output voltage of the DC/DC converter so as to generate a s…
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