Startup circuit and input capacitor balancing circuit

US8971069B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8971069-B2
Application numberUS-201213347616-A
CountryUS
Kind codeB2
Filing dateJan 10, 2012
Priority dateAug 11, 2010
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

Official abstract text for this publication.

In one embodiment, an input capacitor balancing circuit for a power supply is provided. The circuit includes an input capacitance operable to filter input power for the power supply. The input capacitance has a first capacitor and a second capacitor coupled in series between an input voltage and a first node. A voltage divider circuit is coupled to the input voltage and operable to generate a divided voltage therefrom. A buffer circuit is operable to receive the divided voltage and, if the first capacitor and the second capacitor are not balanced, to provide current to the input capacitance to balance the first capacitor and the second capacitor.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuitry for a power supply, comprising: a controller of the power supply, the controller having a startup circuit; and a startup and input capacitor balancing circuit for the power supply, the startup and input capacitor balancing circuit comprising: an input capacitance operable to filter input power for the power supply, the input capacitance having a first capacitor and a second capacitor coupled in series between an input voltage and a first node…

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What does patent US8971069B2 cover?
In one embodiment, an input capacitor balancing circuit for a power supply is provided. The circuit includes an input capacitance operable to filter input power for the power supply. The input capacitance has a first capacitor and a second capacitor coupled in series between an input voltage and a first node. A voltage divider circuit is coupled to the input voltage and operable to generate a d…
Who is the assignee on this patent?
Dunipace Richard A, Fairchild Semiconductor
What technology area does this patent fall under?
Primary CPC classification H02M1/36. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).