Display device and operation method thereof
US-2024371313-A1 · Nov 7, 2024 · US
Two-stage DAC architecture for LCD source driver utilizing one-bit serial charge redistribution DAC
US8970639B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8970639-B2 |
| Application number | US-85989310-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 20, 2010 |
| Priority date | Apr 23, 2010 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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Abstract
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A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage. A voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.
First claim
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What is claimed is: 1. A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code, comprising: a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, the one-bit serial charge redistribution digital-to-analog converter including: a first capacitor coupled be…
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Electricity · mapped topic
Physics · mapped topic
- G09G3/3696Primary
Physics · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8970639B2 cover?
- A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage. A voltage selector sets the high reference vol…
- Who is the assignee on this patent?
- Tu Nang-Ping, Taiwan Semiconductor Mfg Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G09G3/3696. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).