Integrated passives and power amplifier

US8970516B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8970516-B2
Application numberUS-201113235158-A
CountryUS
Kind codeB2
Filing dateSep 16, 2011
Priority dateSep 23, 2010
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate. The power combiner circuit may include passive devices deposited on at least the first side of the first substrate. The integrated circuit may include a power amplifier circuit disposed on and configured for electrical connection with the power combiner circuit, to form a power amplification system. The conductive vias may include thermal vias configured for conducting heat from the power amplification system and/or interconnect vias configured for electrical connection between the power amplification system and a conductor on a second side of the first substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated device, comprising: a glass substrate having a first surface and a second surface that is substantially parallel to the first surface; at least one passive component on the first surface of the glass substrate; an integrated circuit die attached to the first surface of the glass substrate; conductive bonding pads on the second surface of the glass substrate; and a plurality of through-glass vias extending between the first surface and t…

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What does patent US8970516B2 cover?
This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate.…
Who is the assignee on this patent?
Black Justin Phelps, Shenoy Ravindra V, Gousev Evgeni Petrovich, and 7 more
What technology area does this patent fall under?
Primary CPC classification G02B26/001. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).