Class d amplification circuit
US-2024267007-A1 · Aug 8, 2024 · US
Bias current monitor and control mechanism for amplifiers
US8970307B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8970307-B2 |
| Application number | US-201313741571-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 15, 2013 |
| Priority date | Jul 30, 2009 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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Abstract
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Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.
First claim
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What is claimed is: 1. An apparatus comprising: an amplifier comprising first and second transistors coupled in a stack; a sensing circuit coupled to the second transistor in the amplifier and to measure a gate-to-source voltage, Vgs, of the second transistor; and a bias circuit coupled to at least one transistor among the first and second transistors and to generate at least one bias voltage for the at least one transistor based on the measured Vgs voltage of the second trans…
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- What does patent US8970307B2 cover?
- Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. T…
- Who is the assignee on this patent?
- Qualcomm Inc
- What technology area does this patent fall under?
- Primary CPC classification H03F1/30. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).