Display device and method for manufacturing the same

US8970106B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8970106-B2
Application numberUS-201213360838-A
CountryUS
Kind codeB2
Filing dateJan 30, 2012
Priority dateSep 19, 2003
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a display device comprising the steps of: forming a hole injection layer by laminating a first conductive layer and a second conductive layer, the hole injection layer being over a first electrode; and forming an electroluminescent layer over the hole injection layer, wherein a silicon or a silicon oxide concentration of the second conductive layer is higher than that of the first conductive layer. 2. The…

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What does patent US8970106B2 cover?
According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated struc…
Who is the assignee on this patent?
Yamazaki Shunpei, Takayama Toru, Sakamoto Naoya, and 4 more
What technology area does this patent fall under?
Primary CPC classification H10K59/80517. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).