Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices

Patent metadata

Field	Value
Publication number	US-8970045-B2
Application number	US-201213397954-A
Country	US
Kind code	B2
Filing date	Feb 16, 2012
Priority date	Mar 31, 2011
Publication date	Mar 3, 2015
Grant date	Mar 3, 2015

Abstract

Methods of fabricating semiconductor devices that include interposers include the formation of conductive vias through a material layer on a recoverable substrate. A carrier substrate is bonded over the material layer, and the recoverable substrate is then separated from the material layer to recover the recoverable substrate. A detachable interface may be provided between the material layer and the recoverable substrate to facilitate the separation. Electrical contacts that communicate electrically with the conductive vias may be formed over the material layer on a side thereof opposite the carrier substrate. Semiconductor structures and devices are formed using such methods.

First claim

What is claimed is:

1. A method of fabricating a semiconductor device including an interposer, comprising:
forming a semiconductor-on-insulator (SeOI) structure comprising a base recoverable substrate, a layer of semiconductor material, and an insulating layer between the base recoverable substrate and the layer of semiconductor material;
forming conductive vias extending through the layer of semiconductor material but not the insulating layer of the SeOI structure and forming a…

Assignees

• Sadaka Mariam
• Soitec Silicon On Insulator

Inventors

• Sadaka Mariam

Classifications

• H10P72/7432

  Electricity · mapped topic

• H10P72/7416

  Electricity · mapped topic

• H10P72/7412

  Electricity · mapped topic

• H10P72/744

  Electricity · mapped topic

• H10P72/74

  Electricity · mapped topic