Photoelectric conversion module and manufacturing method thereof
US-9214587-B2 · Dec 15, 2015 · US
Autonomous integrated circuits
US8969992B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8969992-B2 |
| Application number | US-201414199206-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 6, 2014 |
| Priority date | Nov 15, 2010 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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Abstract
Official abstract text for this publication.
An autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.
First claim
Opening claim text (preview).
The invention claimed is: 1. An autonomous integrated circuit (IC), comprising; a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate, the bottom substrate comprising a handle substrate of the solar cell, the solar cell comprising a bottom contact; an insulating layer of the SOI substrate located directly on top of the bottom substrate; and a device layer formed in a top semiconductor layer of the SOI substrate, wherein the top semiconductor layer…
Assignees
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Classifications
- H10F77/935Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8969992B2 cover?
- An autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electri…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H10F77/935. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).