Display Substrate, Display Substrate Motherboard and Display Apparatus
US-2024355831-A1 · Oct 24, 2024 · US
ESD protection structure and semiconductor device comprising the same
US8969968B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8969968-B2 |
| Application number | US-201314141337-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 26, 2013 |
| Priority date | Dec 27, 2012 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
An ESD protection structure and a semiconductor device having an ESD protection structure with the ESD protection structure including a patterned conductive ESD protection layer. The ESD protection layer is patterned to have a first portion of a substantially closed ring shape having an outer contour line and an inner contour line parallel with each other. The outer and the inner contour lines are waved lines. The first portion further has a midline between and parallel with the outer and the inner contour lines. The midline is a waved line having a substantially constant curvature at each point of the midline. Therefore the ESD protection layer has a substantially uniform curvature and an increased perimeter which advantageously improve the breakdown voltage and the current handling capacity of the ESD protection structure.
First claim
Opening claim text (preview).
We claim: 1. An ESD protection structure comprising: a patterned conductive ESD protection layer including a first portion of a substantially closed ring shape, wherein the ring shaped first portion has an outer contour line and an inner contour line parallel with each other, and wherein the outer contour line and the inner contour line are waved lines; and wherein the first portion further has a midline located between the outer contour line and the inner contour line, wherein…
Assignees
Inventors
Classifications
- H10W42/60Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US8969968B2 cover?
- An ESD protection structure and a semiconductor device having an ESD protection structure with the ESD protection structure including a patterned conductive ESD protection layer. The ESD protection layer is patterned to have a first portion of a substantially closed ring shape having an outer contour line and an inner contour line parallel with each other. The outer and the inner contour lines …
- Who is the assignee on this patent?
- Chengdu Monolithic Power Sys, Chengdu Monolithic Power Sys
- What technology area does this patent fall under?
- Primary CPC classification H10W42/60. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).