Semiconductor device and manufacturing method thereof

US8969921B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8969921-B2
Application numberUS-201313845750-A
CountryUS
Kind codeB2
Filing dateMar 18, 2013
Priority dateOct 20, 2010
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A semiconductor device is provided with: a GaN layer; an anode electrode that forms a Schottky junction with a Ga face of the GaN layer; and an InGaN layer positioned between at least a part of the anode electrode and the GaN layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a GaN layer; an anode electrode that forms a Schottky junction with a Ga face of the GaN layer; an InGaN layer positioned between at least a part of the anode electrode and the GaN layer; an AlGaN or InAlN layer over the InGaN layer; and a cathode electrode over the AlGaN or InAlN layer, the cathode electrode forming an ohmic junction with the GaN layer, and a part of the AlGaN or InAlN layer being between the anode electrode and the cathode electrode in a plan view, wherein a lower surface of the InGaN layer is in direct contact with an upper surface of the GaN layer just below an outer peripheral end of the anode electrode. 2. The semiconductor device according to claim 1 , wherein the InGaN layer is positioned below the outer peripheral end of the anode electrode in a plan view. 3. The semiconductor device according to claim 2 , further comprising a metal layer formed over the InGaN layer and having a work function higher than that of the anode electrode, wherein the anode electrode covers at least a part of the metal layer. 4. The semiconductor device according to claim 1 , further comprising: a second InGaN layer formed in a same layer as the InGaN layer between the anode electrode and the cathode electrode in a plan view. 5. The semiconductor device according to claim 1 , wherein the AlGaN or InAlN layer is between the InGaN layer and the cathode electrode in a thickness direction of the GaN layer. 6. The semiconductor device according to claim 1 , further comprising a transistor that uses the GaN layer as an electron transit layer. 7. A semiconductor device, comprising: a first GaN layer; an anode electrode that forms a Schottky junction with an N face of the first GaN layer; a nitride semiconductor layer containing Al, having a band gap larger than that of GaN, and positioned between at least a part of the anode electrode and the first GaN layer; a second GaN layer away from the anode electrode in a plan view over the nitride semiconductor layer; and a cathode electrode over the first GaN layer, the cathode electrode forming an ohmic junction with the first GaN layer, and the second GaN layer being between the anode electrode and the cathode electrode in a plan view, wherein a lower surface of the nitride semiconductor layer is in direct contact with an upper surface of the first GaN layer just below an outer peripheral end of the anode electrode. 8. The semiconductor device according to claim 7 , wherein the nitride semiconductor layer is an AlGaN layer, an InAlN layer or an InAlGaN layer. 9. The semiconductor device according to claim 7 , wherein the nitride semiconductor layer is positioned below the outer peripheral end of the anode electrode in a plan view. 10. The semiconductor device according to claim 7 , further comprising: a second nitride semiconductor layer containing Al, having a band gap larger than that of GaN, formed in a same layer as the nitride semiconductor layer, and positioned between the anode electrode and the cathode electrode in a plan view. 11. The semiconductor device according to claim 7 , further comprising a transistor that uses the first GaN layer as an electron transit layer. 12. A manufacturing method of a semiconductor device, comprising: locally forming an InGaN layer over a Ga face of a GaN layer; forming an anode electrode that forms a Schottky junction with the GaN layer so as to make the InGaN layer to be positioned between at least a part of the anode electrode and the GaN layer; forming an AlGaN or InAlN layer over the InGaN layer; and forming a cathode electrode over the AlGaN or InAlN layer, the cathode electrode forming an ohmic junction with the GaN layer, and a part of the AlGaN or InAlN layer being between the anode electrode and the cathode electrode in a plan view, wherein a lower surface of the InGaN layer is in direct contact with an upper surface of the GaN layer just below an outer peripheral end of the anode electrode. 13. The manufacturing method of the semiconductor device according to claim 12 , wherein the locally forming the InGaN layer comprises: forming a raw material layer of the InGaN layer over a whole surface of the GaN layer; locally forming a light-shielding mask over the raw material layer; and performing photo electrochemical etching of the raw material layer using the light-shielding mask to obtain the InGaN layer by. 14. The manufacturing method of the semiconductor device according to claim 13 , wherein a metal layer having a work function higher than that of the anode electrode is used as the light-shielding mask. 15. A manufacturing method of a semiconductor device, comprising: locally forming a nitride semiconductor layer containing Al and having a band gap larger than that of GaN over an N face of a first GaN layer; forming an anode electrode that forms a Schottky junction with the nitride semiconductor layer so as to make the nitride semiconductor layer to be positioned between at least a part of the anode electrode and the first GaN layer; forming a second GaN layer away from the anode electrode in a plan view over the nitride semiconductor layer; and forming a cathode electrode over the first GaN layer, the cathode electrode forming an ohmic junction with the first GaN layer, and the second GaN layer being between the anode electrode and the cathode electrode in a plan view, wherein a lower surface of the nitride semiconductor layer is in direct contact with an upper surface of the first GaN layer just below an outer peripheral end of the anode electrode.

Assignees

Inventors

Classifications

  • Nitrides · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • the connected ends being wedge-shaped · CPC title

  • Die-attach connectors and bond wires · CPC title

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Frequently asked questions

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What does patent US8969921B2 cover?
A semiconductor device is provided with: a GaN layer; an anode electrode that forms a Schottky junction with a Ga face of the GaN layer; and an InGaN layer positioned between at least a part of the anode electrode and the GaN layer.
Who is the assignee on this patent?
Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H10D84/05. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).