Field-effect transistor

US8969919B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8969919-B2
Application numberUS-201113312623-A
CountryUS
Kind codeB2
Filing dateDec 6, 2011
Priority dateSep 20, 2006
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A field-effect transistor includes a carrier transport layer made of nitride semiconductor, a gate electrode having first and second sidewall surfaces on first and second sides, respectively, an insulating film formed directly on the gate electrode to cover at least one of the first and second sidewall surfaces, first and second ohmic electrodes formed on the first and second sides, respectively, a passivation film including a first portion extending from the first ohmic electrode toward the gate electrode to cover a surface area between the first ohmic electrode and the gate electrode and a second portion extending from the second ohmic electrode toward the gate electrode to cover a surface area between the second ohmic electrode and the gate electrode, wherein the insulating film is in direct contact with at least the first and second passivation film portions, and has a composition different from that of the passivation film.

First claim

Opening claim text (preview).

What is claimed is: 1. A compound semiconductor device, comprising: a substrate; a semiconductor multilayer structure including a carrier transport layer made of nitride semiconductor formed above the substrate; a gate electrode, a source electrode, and a drain electrode formed above the semiconductor multilayer structure; an insulating film formed between the gate electrode and the source electrode and between the gate electrode and the drain electrode above the semiconduct…

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What does patent US8969919B2 cover?
A field-effect transistor includes a carrier transport layer made of nitride semiconductor, a gate electrode having first and second sidewall surfaces on first and second sides, respectively, an insulating film formed directly on the gate electrode to cover at least one of the first and second sidewall surfaces, first and second ohmic electrodes formed on the first and second sides, respectivel…
Who is the assignee on this patent?
Ohki Toshihiro, Okamoto Naoya, Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H10D30/4755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).