Display apparatus
US-2024414942-A1 · Dec 12, 2024 · US
Thin film transistor display panel
US8969872B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8969872-B2 |
| Application number | US-201313789335-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 7, 2013 |
| Priority date | Oct 16, 2012 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.
First claim
Opening claim text (preview).
What is claimed is: 1. A thin film transistor display panel, comprising: a substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and comprising a channel portion; and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from one another; wherein a first portion of the semiconductor layer overlaps both the so…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10D30/6755Primary
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US8969872B2 cover?
- A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer …
- Who is the assignee on this patent?
- Samsung Display Co Ltd, Univ Kookmin Ind Acad Coop Found
- What technology area does this patent fall under?
- Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).