Optoelectronic component and method for producing same
US-12176444-B2 · Dec 24, 2024 · US
Integrated circuit wafer and integrated circuit die
US8969869B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8969869-B2 |
| Application number | US-94416010-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 11, 2010 |
| Priority date | Nov 13, 2009 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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Abstract
Official abstract text for this publication.
An integrated circuit wafer and integrated circuit dice are provided. The integrated circuit wafer includes a wafer substrate, a plurality of integrated circuits, a plurality of test-keys, an isolation film, and a plurality of ditches. The integrated circuits are disposed on the wafer substrate in matrix. The test-keys are respectively disposed between the adjacent integrated circuits. The isolation film covers at least one side of the integrated circuits on the wafer substrate. The ditches extend downwardly from the surface of the isolation film and are disposed between the integrated circuit and the adjacent test-key. The integrated circuit die includes a wafer substrate, an integrated circuit disposed on the wafer substrate, and an isolation film covering at least one side of the integrated circuit on the wafer substrate, wherein the side walls of the wafer substrate and the isolation film are respectively smooth walls. The side wall of the wafer substrate is substantially vertical.
First claim
Opening claim text (preview).
What is claimed is: 1. An integrated circuit wafer, comprising: a wafer substrate; a plurality of integrated circuits disposed on the wafer substrate in matrix; a plurality of test-keys respectively disposed between the adjacent integrated circuits; an isolation film covering at least one side of the integrated circuits on the wafer substrate; and a plurality of ditches extending downwardly from a surface of the isolation film between the integrated circuit and the adjacen…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8969869B2 cover?
- An integrated circuit wafer and integrated circuit dice are provided. The integrated circuit wafer includes a wafer substrate, a plurality of integrated circuits, a plurality of test-keys, an isolation film, and a plurality of ditches. The integrated circuits are disposed on the wafer substrate in matrix. The test-keys are respectively disposed between the adjacent integrated circuits. The isol…
- Who is the assignee on this patent?
- Huang Yao-Sheng, Raydium Semiconductor Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W72/0198. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).