Printed circuit board and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-8969736-B2
Application number	US-201213671029-A
Country	US
Kind code	B2
Filing date	Nov 7, 2012
Priority date	Nov 21, 2011
Publication date	Mar 3, 2015
Grant date	Mar 3, 2015

Abstract

A cover insulating layer is formed on a base insulating layer. One of write wiring traces includes first to third lines, and the other write wiring trace includes fourth to sixth lines. The one and other write wiring traces constitute a signal line pair, the second and fifth lines are arranged on an upper surface of the cover insulating layer, and the third and sixth lines are arranged on an upper surface of the base insulating layer. At least parts of the second and fifth lines are respectively opposed to the sixth and third lines with the cover insulating layer sandwiched therebetween. The second and third lines are electrically connected to the first line, and the fifth and sixth lines are electrically connected to the fourth line. The fourth line is electrically connected to at least one of the fifth and sixth lines through a jumper wiring on a lower surface of the base insulating layer.

First claim

I claim:

1. A printed circuit board comprising:
a first insulating layer having first and second surfaces;
a second insulating layer having third and fourth surfaces and formed on said first insulating layer so that said fourth surface contacts said first surface;
first and second wiring traces formed on said first surface of said first insulating layer and said third surface of said second insulating layer, to constitute a signal line pair; and
a conductive connection layer…

Assignees

• Yamauchi Daisuke
• Nitto Denko Corp

Inventors

• Yamauchi Daisuke

Classifications

• G11B5/486 Primary

  Physics · mapped topic

• H05K1/0245

  Electricity · mapped topic

• H05K1/0248

  Electricity · mapped topic

• G11B5/484

  Physics · mapped topic

• G11B5/4853

  Physics · mapped topic