Double patterning via triangular shaped sidewall spacers

US8969205B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8969205-B2
Application numberUS-201313852496-A
CountryUS
Kind codeB2
Filing dateMar 28, 2013
Priority dateMar 28, 2013
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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Abstract

Official abstract text for this publication.

An intermediate semiconductor structure in fabrication includes a silicon semiconductor substrate, a hard mask of silicon nitride (SiN) over the substrate and a sacrificial layer of polysilicon or amorphous silicon over the hard mask. The sacrificial layer is patterned into sidewall spacers for mandrels of a filler material substantially different in composition from the sidewall spacers, such as a flowable oxide. The mandrels are removed such that the sidewall spacers have vertically tapered inner and outer sidewalls providing a rough triangular shape. The rough triangular sidewall spacers are used as a hard mask to pattern the SiN hard mask below.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method, comprising: providing an intermediate semiconductor structure, the structure comprising a semiconductor substrate and a sacrificial layer of a dummy gate material above the substrate; and creating sidewall spacers in the sacrificial layer, the creating comprising vertically tapering inner and outer sidewalls, such that the sidewall spacers have a rough triangular shape with a pointed tip. 2. The method of claim 1 , wh…

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What does patent US8969205B2 cover?
An intermediate semiconductor structure in fabrication includes a silicon semiconductor substrate, a hard mask of silicon nitride (SiN) over the substrate and a sacrificial layer of polysilicon or amorphous silicon over the hard mask. The sacrificial layer is patterned into sidewall spacers for mandrels of a filler material substantially different in composition from the sidewall spacers, such …
Who is the assignee on this patent?
Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification H10P50/695. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).