Method of forming a semiconductor structure including a metal-insulator-metal capacitor

Patent metadata

Field	Value
Publication number	US-8969170-B2
Application number	US-201313827786-A
Country	US
Kind code	B2
Filing date	Mar 14, 2013
Priority date	Mar 14, 2013
Publication date	Mar 3, 2015
Grant date	Mar 3, 2015

Abstract

A method comprises forming a first layer of an electrically insulating material over a semiconductor structure. A recess is formed in the first layer of electrically insulating material. A capacitor layer stack is deposited over the first layer of electrically insulating material. The capacitor layer stack includes one or more bottom electrode layers, a dielectric layer and a top electrode layer, wherein a first portion of the capacitor layer stack is arranged in the recess and a second portion of the capacitor layer stack is arranged over a portion of the first layer of electrically insulating material adjacent the recess. A chemical mechanical polishing process is performed. The chemical mechanical polishing process removes the second portion of the capacitor layer stack, wherein the first portion of the capacitor layer stack is not removed.

First claim

What is claimed:

1. A method, comprising:
forming a first layer of an electrically insulating material over a semiconductor structure;
forming a recess in said first layer of electrically insulating material;
depositing a capacitor layer stack over said first layer of electrically insulating material, said capacitor layer stack comprising one or more bottom electrode layers, a dielectric layer and a top electrode layer, wherein a first portion of said capacitor layer stack is…

Assignees

• Globalfoundries Inc

Inventors

• Liebau Maik
• Pfuetzner Ronny

Classifications

• H10D1/68 Primary

  Electricity · mapped topic

• H01L28/40 Primary

  Electricity · mapped topic