Transistor, semiconductor device, and semiconductor structure
US-2024379874-A1 · Nov 14, 2024 · US
Method for manufacturing semiconductor device
US8969147B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8969147-B2 |
| Application number | US-201113277250-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 20, 2011 |
| Priority date | Jun 15, 2007 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
A highly responsive semiconductor device in which the subthreshold swing (S value) is small and reduction in on-current is suppressed is manufactured. A semiconductor layer in which a thickness of a source region or a drain region is larger than that of a channel formation region is formed. A semiconductor layer having a concavo-convex shape which is included in the semiconductor device is formed by the steps of forming a first semiconductor layer over a substrate; forming a first insulating layer and a conductive layer over the first semiconductor layer; forming a second insulating layer over a side surface of the conductive layer; forming a second semiconductor layer over the first insulating layer, the conductive layer and the second insulating layer; etching the second semiconductor layer using a resist formed partially as a mask; and performing heat treatment to the first semiconductor layer and the second semiconductor layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a semiconductor device comprising the steps of: forming a first semiconductor layer having an island shape over a substrate; forming a gate electrode over a channel formation region in the first semiconductor layer having the island shape with a gate insulating layer interposed therebetween; forming insulating layers on side surfaces of the gate electrode; forming a first region as a source region and a second region as a dra…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10D86/00Primary
Electricity · mapped topic
- H10D30/0323Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8969147B2 cover?
- A highly responsive semiconductor device in which the subthreshold swing (S value) is small and reduction in on-current is suppressed is manufactured. A semiconductor layer in which a thickness of a source region or a drain region is larger than that of a channel formation region is formed. A semiconductor layer having a concavo-convex shape which is included in the semiconductor device is form…
- Who is the assignee on this patent?
- Ohnuma Hideto, Semiconductor Energy Lab
- What technology area does this patent fall under?
- Primary CPC classification H10D86/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).