Optoelectronic integrated package module and method of manufacturing the same

US8965149B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8965149-B2
Application numberUS-201313839930-A
CountryUS
Kind codeB2
Filing dateMar 15, 2013
Priority dateAug 13, 2012
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

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According to one embodiment, there is provided an optoelectronic integrated package module including a silicon interposer, an optical semiconductor element formed in the silicon interposer, and a semiconductor integrated circuit chip module including a first semiconductor integrated circuit chip including a logic circuit and mounted on a first principal surface and a second semiconductor integrated circuit chip having a second principal surface side mounted on the silicon interposer. The first and second semiconductor integrated circuit chips are electrically connected to each other via the via interconnections formed inside the second semiconductor integrated circuit chip from the first principal surface. The first or second semiconductor integrated circuit chip receives an electrical signal obtained via the via interconnection by means of the unterminated reception circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. An optoelectronic integrated package module comprising: a silicon interposer formed on a silicon substrate, the interposer including an electrical interconnection and an optical waveguide; an optical semiconductor element formed in the silicon interposer, the optical semiconductor element being electrically connected to the electrical interconnection and optically coupled to the optical waveguide; and a semiconductor integrated circuit chip module includ…

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What does patent US8965149B2 cover?
According to one embodiment, there is provided an optoelectronic integrated package module including a silicon interposer, an optical semiconductor element formed in the silicon interposer, and a semiconductor integrated circuit chip module including a first semiconductor integrated circuit chip including a logic circuit and mounted on a first principal surface and a second semiconductor integr…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification G02B6/12. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).