Method for implementing a multi-chip module with a high-rate interface

Patent metadata

Field	Value
Publication number	US-8964772-B2
Application number	US-201213648227-A
Country	US
Kind code	B2
Filing date	Oct 9, 2012
Priority date	Oct 9, 2012
Publication date	Feb 24, 2015
Grant date	Feb 24, 2015

Abstract

A multi-chip module (MCM) may include a substrate, and first and second physical-layer (PHY) chips mounted on the substrate. In some implementations, the first PHY chip includes a multiplexer and a PHY circuit. The multiplexer is configured to receive a multiplexed data stream from a media access control (MAC) device, to demultiplex the multiplexed data stream into first and second data streams, to output the first data stream to the PHY circuit, and to output the second data stream to the second PHY chip. In some implementations, the first PHY includes a router and a PHY circuit. The router is configured to receive a plurality of data packets from a MAC device, to route one or more of the data packets having a first address to the PHY circuit, and to route one or more of the data packets having a second address to the second PHY chip.

First claim

What is claimed is:

1. A multi-chip module, comprising:
a substrate;
a first physical-layer (PHY) chip mounted on the substrate, the first PHY chip comprising a multiplexer and a first physical-layer (PHY) circuit;
a second PHY chip mounted on the substrate; and
a first physical interface coupling the first PHY chip to the second PHY chip;
wherein the multiplexer of the first PHY chip is configured to receive a multiplexed data stream from a media access control (MAC) devi…

Assignees

• Broadcom Corp

Inventors

• Woodruff William Calvin

Classifications

• H04L45/745

  Electricity · mapped topic

• H04L49/30

  Electricity · mapped topic

• H04J3/047 Primary

  Electricity · mapped topic

• H04J3/0697

  Electricity · mapped topic

• H04L49/40

  Electricity · mapped topic