Write driver circuit with low voltage bootstrapping for write assist

Patent metadata

Field	Value
Publication number	US-8964490-B2
Application number	US-201313761646-A
Country	US
Kind code	B2
Filing date	Feb 7, 2013
Priority date	Feb 7, 2013
Publication date	Feb 24, 2015
Grant date	Feb 24, 2015

Abstract

Embodiments of a memory are disclosed that may allow for a negative boost of data lines during a write. The memory device may include a data input circuit, an address decode circuit and a plurality of sub-arrays. Each of the sub-arrays may include a plurality of columns, a write selection circuit, a first write driver circuit, a second write driver circuit, and a boost circuit. Each of the columns may include a plurality of data storage cells. The write selection circuit may select a column of the plurality of columns. Each of the write driver circuits may be configured to discharge a data line of a selected column into a common node. The boost circuit may be configured to initialize the common node to the first voltage level and couple the common node to a second voltage level, where the second voltage level is lower than the first voltage level.

First claim

What is claimed is:

1. An apparatus, comprising:
a write driver circuit configured to:
initialize an output node to a first voltage level; and
discharge the output node to a second voltage level responsive to a write data signal;
wherein the second voltage level is lower than the first voltage level; and

a boost circuit coupled to the output node, wherein the boost circuit is configured to couple the output node to a third voltage level responsive to a boost control signa…

Assignees

• Apple Inc

Inventors

• Chow Daniel C
• Huang Hang
• Bhatia Ajay Kumar
• Sullivan Steven C

Classifications

• G11C5/145

  Physics · mapped topic

• G11C11/419

  Physics · mapped topic

• G11C7/1096 Primary

  Physics · mapped topic