Program verify word line ramping delay for lower current consumption mode
US-2024395343-A1 · Nov 28, 2024 · US
US8964466B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8964466-B2 |
| Application number | US-201414264303-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 29, 2014 |
| Priority date | Nov 16, 2008 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Official abstract text for this publication.
A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.
Opening claim text (preview).
What is claimed is: 1. An apparatus, comprising: a processing unit configured to receive a first command from a host to read data from a memory, wherein the memory includes a plurality of planes; and an interface coupled to the memory, wherein the interface is configured to: send a second command to the memory to read data from a first plane of the plurality of planes responsive to the processing unit receiving the first command; and receive data from the first plane of the p…
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