Differential MRAM structure with relatively reversed magnetic tunnel junction elements enabling writing using same polarity current

US8964458B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8964458-B2
Application numberUS-201213446250-A
CountryUS
Kind codeB2
Filing dateApr 13, 2012
Priority dateApr 13, 2012
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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Abstract

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A magnetoresistive memory has first and second magnetic tunnel junction (MTJ) elements operated differentially, each with a pinned magnetic layer and a free magnetic layer that can have field alignments that are parallel or anti-parallel, producing differential high and low resistance states representing a bit cell value. Writing a high resistance state to an element requires an opposite write current polarity through the pinned and free layers, and differential operation requires that the two MTJ elements be written to different resistance states. One aspect is to arrange or connect the layers in normal and reverse order relative to a current bias source, thereby achieving opposite write current polarities relative to the layers using the same current polarity relative to the current bias source. The differentially operated MTJ elements can supplement or replace single MTJ elements in a nonvolatile memory bit cell array.

First claim

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We claim: 1. A digital memory apparatus, comprising: at least one array of magnetoresistive memory bit cells, each said bit cell in at least a subset of the array comprising at least a first magnetic tunnel junction element and at least a second magnetic junction element, wherein each of the first and second magnetic tunnel junction elements comprises a pinned magnetic layer with a permanent magnetic field aligned in a reference direction, and a free magnetic layer with a magnetic…

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What does patent US8964458B2 cover?
A magnetoresistive memory has first and second magnetic tunnel junction (MTJ) elements operated differentially, each with a pinned magnetic layer and a free magnetic layer that can have field alignments that are parallel or anti-parallel, producing differential high and low resistance states representing a bit cell value. Writing a high resistance state to an element requires an opposite write …
Who is the assignee on this patent?
Lin Kai-Chun, Yu Hung-Chang, Chih Yue-Der, and 2 more
What technology area does this patent fall under?
Primary CPC classification G11C11/1659. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).