Memory device
US-2024112732-A1 · Apr 4, 2024 · US
US8964458B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8964458-B2 |
| Application number | US-201213446250-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 13, 2012 |
| Priority date | Apr 13, 2012 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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A magnetoresistive memory has first and second magnetic tunnel junction (MTJ) elements operated differentially, each with a pinned magnetic layer and a free magnetic layer that can have field alignments that are parallel or anti-parallel, producing differential high and low resistance states representing a bit cell value. Writing a high resistance state to an element requires an opposite write current polarity through the pinned and free layers, and differential operation requires that the two MTJ elements be written to different resistance states. One aspect is to arrange or connect the layers in normal and reverse order relative to a current bias source, thereby achieving opposite write current polarities relative to the layers using the same current polarity relative to the current bias source. The differentially operated MTJ elements can supplement or replace single MTJ elements in a nonvolatile memory bit cell array.
Opening claim text (preview).
We claim: 1. A digital memory apparatus, comprising: at least one array of magnetoresistive memory bit cells, each said bit cell in at least a subset of the array comprising at least a first magnetic tunnel junction element and at least a second magnetic junction element, wherein each of the first and second magnetic tunnel junction elements comprises a pinned magnetic layer with a permanent magnetic field aligned in a reference direction, and a free magnetic layer with a magnetic…
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