Semiconductor device and switching regulator using the device

US8964343B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8964343-B2
Application numberUS-201314051792-A
CountryUS
Kind codeB2
Filing dateOct 11, 2013
Priority dateDec 9, 2009
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate of the output transistor; an overvoltage protection circuit for monitoring an electric potential difference between the switching voltage and the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: an n-channel or npn-type output transistor wherein an input voltage is impressed on a drain or a collector, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source or an emitter; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate or base of the output transistor; an overvoltage protection circuit for monitoring the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal. 2. The semiconductor device of claim 1 , wherein the switching element is a high-withstand-voltage element that does not break down upon generation of an electric potential difference that corresponds to twice the input voltage between the switching voltage and the boost voltage. 3. The semiconductor device of claim 1 , wherein the bootstrap circuit has a diode whose anode is connected to the end impressed with the constant voltage, and whose cathode is connected to the end impressed with the boost voltage via the switching element. 4. The semiconductor device of claim 1 , wherein the overvoltage protection circuit has the following components: a p-channel or pnp-type transistor whose source or emitter is connected to the end impressed with the boost voltage, and whose drain or collector is connected to an on/off control terminal of the switching element; a first Zener diode whose anode is connected to the end impressed with the switching voltage; a first resistor connected between the on/off control terminal of the switching element and the end impressed with the switching voltage; a second resistor connected between a gate or base of the transistor and a cathode of the first Zener diode; and a third resistor connected between a cathode of the first Zener diode and the end impressed with the boost voltage. 5. The semiconductor device of claim 4 , wherein the overvoltage protection circuit further has the following components: a second Zener diode whose anode is connected to a gate or base of the transistor; and a fourth resistor connected between a cathode of the second Zener diode and a terminal impressed with the boost voltage. 6. The semiconductor device of claim 1 , comprising: a synchronous rectification transistor connected between the end impressed with the switching voltage and the end impressed with the ground voltage, the transistor being switchably driven in complementary fashion to the output transistor. 7. The semiconductor device of claim 1 , comprising: a shutdown circuit for forcibly stopping an operation of the semiconductor device when an overvoltage protection operation by the overvoltage protection circuit has repeatedly continued over a prescribed time period. 8. The semiconductor device of claim 7 , wherein the shutdown circuit has the following components: a level shift circuit for monitoring an electric potential difference between the switching voltage and the boost voltage; and a timer latch circuit for monitoring an input signal from the level shift circuit and setting a shutdown signal to an abnormal logic level to forcibly stop an operation of the semiconductor device when the logic level of the input signal intermittently cycles between a high level and a low level over a prescribed time period. 9. The semiconductor device of claim 1 , wherein the internal circuit is a level shifter and driver for generating the switching drive signal on the basis of a predetermined switching control signal. 10. The semiconductor device of claim 1 , comprising the following components: an error amplifier for amplifying a differential between a predetermined target voltage and a feedback voltage that corresponds to an output voltage obtained by rectifying and smoothing the switching voltage, and for generating an error voltage; an oscillator for generating a clock signal having a predetermined frequency; a slope voltage generation circuit for generating a slope voltage having a triangular, ramp, or sawtooth waveform on the basis of the clock signal; a PWM comparator for comparing the error voltage and the slope voltage and generating a pulse width modification signal; and a drive control circuit for generating the switching control signal on the basis of the clock signal and the pulse width modification signal. 11. A switching regulator, comprising: a semiconductor device; a rectifying/smoothing circuit for rectifying/smoothing a pulsed switching voltage generated by the semiconductor device, and generating a desired output voltage; a feedback voltage generation circuit for generating a feedback voltage that corresponds to the output voltage; and a capacitor connected between the end impressed with the switching voltage and the end impressed with the boost voltage, the capacitor forming a bootstrap circuit; wherein the semiconductor device includes: an n-channel or npn-type output transistor wherein an input voltage is impressed on a drain or a collector, and a pulsed form of the switching voltage that corresponds to a switching drive of the transistor is brought out from a source or an emitter; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate or base of the output transistor; an overvoltage protection circuit for monitoring the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal. 12. The switching regulator of claim 11 , wherein the switching element is a high-withstand-voltage element that does not break down upon generation of an electric potential difference that corresponds to twice the input voltage between the switching voltage and the boost voltage. 13. The switching regulator of claim 11 , wherein the bootstrap circuit has a diode whose anode is connected the end impressed with the constant voltage, and whose cathode is connected to the end impressed with the boost voltage via the switching element. 14. The switching regulator of claim 11 , wherein the overvoltage protection circuit has the following components: a p-channel or pnp-type transistor whose source or emitter is connected to a terminal impressed with the boost voltage, and whose drain or collector is connected to an on/off control terminal of the switching element; a first Zener diode whose anode is connected to the end impressed with the switching voltage; a first resistor connected between the on/off control terminal of the switching element and the end impressed with the switching voltage; a second resistor connected between a gate or base of the transistor and a cathode of the first Zener diode; and a third resistor connected between a cathode of the first Zener diode and the end impressed with the boost voltage. 15. The switching regulator of claim 14 , wherein the overvoltage protection circuit further has the following components: a second Zener diode whose anode is

Assignees

Inventors

Classifications

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

  • in field-effect transistor switches · CPC title

  • H02M1/32Primary

    Means for protecting converters other than automatic disconnection · CPC title

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What does patent US8964343B2 cover?
The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an inter…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03K17/0822. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).