Solid-state imaging device and camera system

US8964078B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8964078-B2
Application numberUS-201414470636-A
CountryUS
Kind codeB2
Filing dateAug 27, 2014
Priority dateNov 15, 2007
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A solid-state imaging device and a camera system are disclosed. The solid-state imaging device includes a pixel unit and a pixel signal readout circuit. The pixel signal readout circuit includes a plurality of comparators disposed to correspond to a pixel column array, and a plurality of counters. Each counter includes a first amplifier, a second amplifier, and a mirror circuit to from a current mirror in parallel with the second amplifier. The first amplifier includes differential transistors, initializing switches connected between gates and collectors of the differential transistors, and first and second capacitors connected to each of the gates of the differential transistors. The second amplifier includes an initializing switch and a third capacitor. The mirror circuit includes a gate input transistor whose gate is inputted with a voltage sampled by the first amplifier or a voltage sampled by the second amplifier.

First claim

Opening claim text (preview).

What is claimed is: 1. A solid-state imaging device comprising: a pixel unit including a plurality of pixels arranged in a matrix shape, wherein each pixel is configured to perform photoelectric conversion; and a pixel signal readout circuit for reading out a pixel signal from the pixel unit in units of a plurality pixels, wherein: the pixel signal readout circuit includes: a plurality of comparators disposed to correspond to a column array of pixels, each of the comparators…

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What does patent US8964078B2 cover?
A solid-state imaging device and a camera system are disclosed. The solid-state imaging device includes a pixel unit and a pixel signal readout circuit. The pixel signal readout circuit includes a plurality of comparators disposed to correspond to a pixel column array, and a plurality of counters. Each counter includes a first amplifier, a second amplifier, and a mirror circuit to from a curren…
Who is the assignee on this patent?
Sony Corp
What technology area does this patent fall under?
Primary CPC classification H04N25/767. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).