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Display panel and display apparatus having the same
US8963818B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963818-B2 |
| Application number | US-201113212782-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 18, 2011 |
| Priority date | Dec 29, 2010 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A display panel includes a plurality of data lines, a plurality of gate lines, a plurality of dummy loads, a pad portion and a fanout portion. The data lines are disposed in a display area, on which a plurality of pixels are disposed. The gate lines are disposed in the display area and cross the data lines. The dummy loads are disposed in a peripheral area surrounding the display area. The pad portion is disposed in the peripheral area and includes signal pads and dummy pads. The fanout portion includes a first fanout line portion connecting the data lines to the signal pads, and a second fanout line portion connecting the dummy loads to the dummy pads.
First claim
Opening claim text (preview).
What is claimed is: 1. A display panel comprising: a plurality of data lines disposed in a display area, on which a plurality of pixels are disposed; a plurality of gate lines disposed in the display area and crossing the data lines; a plurality of dummy loads disposed in a peripheral area adjacent to the display area, wherein the dummy loads include a plurality of dummy data lines adjacent to the data lines; a pad portion disposed in the peripheral area and including signal…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G09G3/3688Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US8963818B2 cover?
- A display panel includes a plurality of data lines, a plurality of gate lines, a plurality of dummy loads, a pad portion and a fanout portion. The data lines are disposed in a display area, on which a plurality of pixels are disposed. The gate lines are disposed in the display area and cross the data lines. The dummy loads are disposed in a peripheral area surrounding the display area. The pad …
- Who is the assignee on this patent?
- Kim Chang-Sin, Kang Byeong-Doo, Lee Yong-Soon, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification G09G3/3688. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).