Switched-capacitor circuits in a PLL
US-9806724-B1 · Oct 31, 2017 · US
Phase-locked loop circuit
US8963594B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963594-B2 |
| Application number | US-201313892082-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 10, 2013 |
| Priority date | May 11, 2012 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
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A phase-locked loop (PLL) circuit is provided. The PLL circuit includes a phase frequency detector (PFD), a first charge pump (CP), a second CP, a first loop component set, a second loop component set, a voltage control oscillator (VCO) and a frequency divider. The first CP and the second CP are coupled to the PFD. The first loop component set is coupled between the first CP and the VCO. The second loop component set is coupled between the second CP and the VCO. The frequency divider is coupled between the PFD and the VCO. The first loop component set generates an offset current to adjust the working range of the first CP and the second CP. The second loop component set generates an offset current and a DC adjustment voltage to control the control voltage outputted to the VCO.
First claim
Opening claim text (preview).
What is claimed is: 1. A phase-locked loop (PLL) circuit comprising: a phase frequency detector, being configured to generate a correction signal according to a reference signal and a feedback signal; a first charge pump (CP), being configured to generate a first current according to the correction signal; a first loop component set, being configured to generate a first offset current, and generate a first control voltage according to the first current and the first offset cur…
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Classifications
- H03L7/0893Primary
Electricity · mapped topic
Electricity · mapped topic
- H03L7/00Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8963594B2 cover?
- A phase-locked loop (PLL) circuit is provided. The PLL circuit includes a phase frequency detector (PFD), a first charge pump (CP), a second CP, a first loop component set, a second loop component set, a voltage control oscillator (VCO) and a frequency divider. The first CP and the second CP are coupled to the PFD. The first loop component set is coupled between the first CP and the VCO. The se…
- Who is the assignee on this patent?
- Realtek Semiconductor Corp
- What technology area does this patent fall under?
- Primary CPC classification H03L7/0893. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).