Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Packaged semiconductor device
US8963318B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963318-B2 |
| Application number | US-201313781732-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 28, 2013 |
| Priority date | Feb 28, 2013 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A packaged semiconductor device includes a substrate including a first major surface, a second major surface, first vias running between the first major surface and the second major surface, first contact pads contacting the first vias at the first major surface, second contact pads contacting the first vias at the second major surface, and an opening between the first major surface and the second major surface. A first integrated circuit (IC) die is positioned in the opening in the substrate. Electrical connections are formed between the second IC die and the second contact pads. A first conductive layer is over the first contact pads and contact pads on the first IC die. Encapsulating material is on the second major surface of the substrate around the first IC die, the second IC die, the electrical connections, and between edges of the opening and edges of the first IC die.
First claim
Opening claim text (preview).
What is claimed is: 1. A packaged semiconductor device, comprising: a first integrated circuit die positioned in an opening in a circuit board, the first integrated circuit die having an active surface facing a same direction as a first major surface of the circuit board, the circuit board further comprising a second major surface, first vias running between the first major surface and the second major surface, first contact pads contacting the first vias at the first major surfac…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8963318B2 cover?
- A packaged semiconductor device includes a substrate including a first major surface, a second major surface, first vias running between the first major surface and the second major surface, first contact pads contacting the first vias at the first major surface, second contact pads contacting the first vias at the second major surface, and an opening between the first major surface and the sec…
- Who is the assignee on this patent?
- Yap Weng F, Freescale Semiconductor Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W70/611. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).