Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Stacked packaged integrated circuit devices, and methods of making same
US8963302B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963302-B2 |
| Application number | US-201313898782-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 21, 2013 |
| Priority date | May 16, 2007 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
Official abstract text for this publication.
A device is disclosed which includes a first packaged integrated circuit device, a second packaged integrated circuit device positioned above the first packaged integrated circuit device and a plurality of planar conductive members conductively coupling the first and second packaged integrated circuit devices to one another. A method is also disclosed which includes conductively coupling a plurality of extensions on a leadframe to each of a pair of stacked packaged integrated circuit devices and cutting the leadframe to singulate the extensions from one another.
First claim
Opening claim text (preview).
What is claimed: 1. A method of forming a semiconductor device assembly, comprising: attaching a first side of a lead frame to a first semiconductor device package; attaching a second side of the lead frame opposite the first side to a second semiconductor device package, wherein the lead frame includes individual extensions that extend into a gap between the first and second semiconductor device packages; and removing an outer portion of the lead frame located outside of the…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8963302B2 cover?
- A device is disclosed which includes a first packaged integrated circuit device, a second packaged integrated circuit device positioned above the first packaged integrated circuit device and a plurality of planar conductive members conductively coupling the first and second packaged integrated circuit devices to one another. A method is also disclosed which includes conductively coupling a plur…
- Who is the assignee on this patent?
- Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).