High resistivity silicon-on-insulator substrate and method of forming

Patent metadata

Field	Value
Publication number	US-8963293-B2
Application number	US-201414151582-A
Country	US
Kind code	B2
Filing date	Jan 9, 2014
Priority date	Jan 3, 2012
Publication date	Feb 24, 2015
Grant date	Feb 24, 2015

Abstract

A semiconductor structure and a method of forming the same. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate includes: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC), a polycrystalline SiC, an amorphous diamond, or a polycrystalline diamond; forming an insulator layer over the high resistivity material layer; and bonding a donor wafer to a top surface of the insulator layer to form the SOI wafer substrate.

First claim

We claim:

1. A silicon-on-insulator (SOI) wafer substrate, comprising:
a handle substrate;
a high resistivity material layer overlying the handle substrate, the high resistivity material layer including one of an amorphous carbon, an amorphous diamond, or a polycrystalline diamond;
an insulator layer over the high resistivity material layer,
wherein the insulator layer includes boro-phospho-silicate glass (BPSG); and
a donor wafer over a top surface of the insulator layer,…

Assignees

• IBM

Inventors

• Botula Alan B
• Jaffe Mark D
• Joseph Alvin J

Classifications

• H10W10/181

  Electricity · mapped topic

• H10P90/1916 Primary

  Electricity · mapped topic

• H10P90/00

  Electricity · mapped topic

• H10D62/83 Primary

  Electricity · mapped topic

• H01L21/76254

  Electricity · mapped topic