Device isolation in finFET CMOS

US8963259B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8963259-B2
Application numberUS-201313906852-A
CountryUS
Kind codeB2
Filing dateMay 31, 2013
Priority dateMay 31, 2013
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility channel material (e.g., silicon, or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of replacement fins to prevent carrier spill-out to the replacement fins.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a retrograde doped layer formed over a substrate, the retrograde doped layer comprising one of: doped silicon (Si), and doped silicon-germanium (Si—Ge); a set of replacement fins formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility channel material; and a carbon liner between the retrograde doped layer and the set of replacement fins. 2. The semiconductor device according to claim 1 , further comprising a set of silicon fins adjacent the set of replacement fins, the set of silicon fins formed over the retrograde doped layer. 3. The semiconductor device according to claim 1 , wherein the high mobility channel material comprises at least one of: Si, and Si—Ge.

Assignees

Inventors

Classifications

  • characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

  • using masks · CPC title

  • Non-deposition formation processes · CPC title

  • Doping during depositing · CPC title

  • Silicon, silicon germanium or germanium · CPC title

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What does patent US8963259B2 cover?
Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility…
Who is the assignee on this patent?
Globalfoundries Inc, IBM, Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D84/0193. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).