Strained silicon carbide channel for electron mobility of NMOS

Patent metadata

Field	Value
Publication number	US-8963255-B2
Application number	US-201414219910-A
Country	US
Kind code	B2
Filing date	Mar 19, 2014
Priority date	Mar 18, 2010
Publication date	Feb 24, 2015
Grant date	Feb 24, 2015

Abstract

A semiconductor is formed on a (110) silicon (Si) substrate, with improved electron mobility. Embodiments include semiconductor devices having a silicon carbide (SiC) portion in the nFET channel region. An embodiment includes forming an nFET channel region and a pFET channel region in a Si substrate, such as a (110) Si substrate, and forming a silicon carbide (SiC) portion on the nFET channel region. The SiC portion may be formed by ion implantation of C followed by a recrystallization anneal or by epitaxial growth of SiC in a recess formed in the substrate. The use of SiC in the nFET channel region improves electron mobility without introducing topographical differences between NMOS and PMOS transistors.

First claim

What is claimed is:

1. A semiconductor device comprising:
a silicon (Si) substrate;
an nFET channel region and a pFET channel region in the substrate;
strained silicon carbide (SiC) formed in an upper portion of the nFET channel region at an upper surface thereof and not in the pFET channel region; and
an nFET gate over the nFET channel region and a pFET gate over the pFET channel region and source/drain regions at opposite sides of each of the nFET and pFET gates.…

Assignees

• Globalfoundries Inc

Inventors

• Wahl Jeremy A
• Maitra Kingsuk

Classifications

• H10P30/226

  Electricity · mapped topic

• H10P30/224

  Electricity · mapped topic

• H10P30/208

  Electricity · mapped topic

• H10P30/204 Primary

  Electricity · mapped topic

• H10D84/0167

  Electricity · mapped topic