Semiconductor device and manufacturing method thereof
US-2024006486-A1 · Jan 4, 2024 · US
Dual-gate VDMOS device
US8963218B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963218-B2 |
| Application number | US-201113249594-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 30, 2011 |
| Priority date | Sep 30, 2011 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
Semiconductor devices are described that include a dual-gate configuration. In one or more implementations, the semiconductor devices include a substrate having a first surface and a second surface. The substrate includes a first and a second body region formed proximal to the first surface. Moreover, each body region includes a source region formed therein. The substrate further includes a drain region formed proximal to the second surface and an epitaxial region that is configured to function as a drift region between the drain region and the source regions. A dual-gate is formed over the first surface of the substrate. The dual-gate includes a first gate region and a second gate region that define a gap there between to reduce the gate to drain capacitance.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a substrate having a first surface and a second surface; a first source region of a first conductivity type and a first body region of a second conductivity type formed in the substrate proximal to the first surface, the first source region formed in the first body region; a second source region of the first conductivity type and a second body region of the second conductivity type formed in the substrate proximal to th…
Assignees
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Classifications
Electricity · mapped topic
- H10D30/0293Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8963218B2 cover?
- Semiconductor devices are described that include a dual-gate configuration. In one or more implementations, the semiconductor devices include a substrate having a first surface and a second surface. The substrate includes a first and a second body region formed proximal to the first surface. Moreover, each body region includes a source region formed therein. The substrate further includes a dra…
- Who is the assignee on this patent?
- Sobti Harmeet, Mcguire Timothy K, Snyder David L, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/0293. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).