Optoelectronic component and method for producing same
US-12176444-B2 · Dec 24, 2024 · US
Slim LED package
US8963196B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963196-B2 |
| Application number | US-201414161377-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 22, 2014 |
| Priority date | Dec 3, 2007 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
Disclosed herein is a slim LED package. The slim LED package includes first and second lead frames separated from each other, a chip mounting recess formed on one upper surface region of the first lead frame by reducing a thickness of the one upper surface region below other upper surface regions of the first lead frame, an LED chip mounted on a bottom surface of the chip mounting recess and connected with the second lead frame via a bonding wire, and a transparent encapsulation material protecting the LED chip while supporting the first and second lead frames.
First claim
Opening claim text (preview).
What is claimed is: 1. A light emitting diode (LED) package, comprising: a first lead frame and a second lead frame separated from each other; an LED chip disposed on the first lead frame and electrically connected to the first lead frame and the second lead frame; and a wire connecting the LED chip to the second lead frame, wherein opposing sides of the first lead frame and the second lead frame face each other in a slanted state to the other sides of the lead frames.…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8963196B2 cover?
- Disclosed herein is a slim LED package. The slim LED package includes first and second lead frames separated from each other, a chip mounting recess formed on one upper surface region of the first lead frame by reducing a thickness of the one upper surface region below other upper surface regions of the first lead frame, an LED chip mounted on a bottom surface of the chip mounting recess and co…
- Who is the assignee on this patent?
- Seoul Semiconductor Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10H20/8506. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).