Display apparatus
US-2024414942-A1 · Dec 12, 2024 · US
Pixelated imager with motfet and process
US8962377B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8962377-B2 |
| Application number | US-201213713744-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2012 |
| Priority date | Dec 13, 2012 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.
First claim
Opening claim text (preview).
Having fully described the invention in such clear and concise terms as to enable those skilled in the art to understand and practice the same, the invention claimed is: 1. A method of fabricating a pixelated imager comprising the steps of: providing a substrate with a bottom contact layer and sensing element blanket layers deposited or grown on the bottom contact layer; separating the sensing element blanket layers into an array of sensing elements with trenches isolating adjac…
Assignees
Inventors
Classifications
Cross-Sectional Technologies · mapped topic
- H10D86/423Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US8962377B2 cover?
- A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal …
- Who is the assignee on this patent?
- Shieh Chan-Long, Yu Gang, Cbrite Inc
- What technology area does this patent fall under?
- Primary CPC classification H10D86/423. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).