Annealing for damage free laser processing for high efficiency solar cells
US-9214585-B2 · Dec 15, 2015 · US
Hybrid polysilicon heterojunction back contact cell
US8962373B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8962373-B2 |
| Application number | US-201314083141-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 18, 2013 |
| Priority date | Dec 21, 2011 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
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A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a solar cell comprising a silicon substrate, the silicon substrate having a front side configured to face the sun during normal operation and a back side opposite the front side, and the method comprising: providing a silicon substrate having a thin dielectric layer on the back side, and a doped silicon layer over the thin dielectric layer; forming an oxide layer over the doped silicon layer; partially removing the oxide layer…
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Classifications
Electricity · mapped topic
- H10F77/703Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8962373B2 cover?
- A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fin…
- Who is the assignee on this patent?
- Cousins Peter J, Smith David D, Rim Seung Bum, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10F77/703. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).