Transistor contacts and methods of forming the same
US-2024395871-A1 · Nov 28, 2024 · US
Method for doping semiconductor structures and the semiconductor device thereof
US8962369B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8962369-B2 |
| Application number | US-201313938750-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 10, 2013 |
| Priority date | Jul 6, 2008 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
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A method for introducing species into a strained semiconductor layer comprising: providing a substrate comprising a first region comprising an exposed strained semiconductor layer, loading the substrate in a reaction chamber, then forming a conformal first species containing-layer by vapor phase deposition (VPD) at least on the exposed strained semiconductor layer, and thereafter performing a thermal treatment, thereby diffusing at least part of the first species from the first species-containing layer into the strained semiconductor layer and activating at least part of the diffused first species in the strained semiconductor layer.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method for introducing species into a narrow fin structure to form a conformal dopant profile, wherein said method comprises: a) providing in a reaction chamber a substrate comprising at least an exposed fin structure, made in a semiconductor material having an initial degree of crystallinity and having a fin width, b) forming a conformal species containing-layer by vapor phase deposition at least on the exposed fin structure, c) growing an epita…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8962369B2 cover?
- A method for introducing species into a strained semiconductor layer comprising: providing a substrate comprising a first region comprising an exposed strained semiconductor layer, loading the substrate in a reaction chamber, then forming a conformal first species containing-layer by vapor phase deposition (VPD) at least on the exposed strained semiconductor layer, and thereafter performing a t…
- Who is the assignee on this patent?
- Imec
- What technology area does this patent fall under?
- Primary CPC classification H10D30/024. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).