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Vertically structured group III nitride semiconductor LED chip and method for manufacturing the same
US8962362B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8962362-B2 |
| Application number | US-200913503582-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 5, 2009 |
| Priority date | Nov 5, 2009 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
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A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method for manufacturing vertically structured Group III nitride semiconductor LED chips, comprising: a light emitting laminate formation step of forming a light emitting laminate by sequentially stacking a first conductivity type Group III nitride semiconductor layer, a light emitting layer, and a second conductivity type Group III nitride semiconductor layer on a growth substrate, the second conductivity type being different from the first conducti…
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Electricity · mapped topic
Electricity · mapped topic
- H10H20/825Primary
Electricity · mapped topic
Electricity · mapped topic
- H10H20/857Primary
Electricity · mapped topic
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- What does patent US8962362B2 cover?
- A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitt…
- Who is the assignee on this patent?
- Cho Meoung Whan, Lee Seog Woo, Jang Pil Guk, and 5 more
- What technology area does this patent fall under?
- Primary CPC classification H10H20/825. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).