Victim cache that supports draining write-miss entries
US-2024264952-A1 · Aug 8, 2024 · US
US8959528B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8959528-B2 |
| Application number | US-201313798622-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 13, 2013 |
| Priority date | Mar 13, 2013 |
| Publication date | Feb 17, 2015 |
| Grant date | Feb 17, 2015 |
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Official abstract text for this publication.
Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.
Opening claim text (preview).
What is claimed is: 1. An apparatus for acknowledging incoming messages, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue;…
Physics · mapped topic
Physics · mapped topic
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