Video Channel Display Method and Apparatus
US-2015380056-A1 · Dec 31, 2015 · US
US8959296B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8959296-B2 |
| Application number | US-201113324394-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2011 |
| Priority date | Dec 13, 2011 |
| Publication date | Feb 17, 2015 |
| Grant date | Feb 17, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Method and apparatus for centralized timestamp processing is described herein. A graphics processing system includes multiple graphics engines and a timestamp module. For each task, a graphics driver assigns the task to a graphics engine and writes a task command packet to a memory buffer associated with the graphics engine. The graphics driver also writes a timestamp command packet for each task to a timestamp module memory buffer. A command processor associated with the graphics engine signals the timestamp module memory buffer upon completion of the task. If the read pointer is at the appropriate position in the timestamp module memory buffer, the timestamp module/timestamp module memory buffer executes the timestamp command packet and writes the timestamp to a timestamp memory. The timestamp memory is accessible by the graphics driver.
Opening claim text (preview).
What is claimed is: 1. A system, comprising: a processor including multiple processing engines, each engine having a memory buffer; the processor including at least one command processor associated with the multiple processing engines; a timestamp module having a corresponding timestamp memory buffer, wherein the at least one command processor is configured to signal the timestamp module upon completion of a task stored in an associated memory buffer; and a timestamp memory…
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.