Techniques For Variable Forward Error Correction
US-2016373138-A1 · Dec 22, 2016 · US
Communication apparatus
US8958505B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8958505-B2 |
| Application number | US-201313951739-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 26, 2013 |
| Priority date | Mar 18, 2011 |
| Publication date | Feb 17, 2015 |
| Grant date | Feb 17, 2015 |
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Abstract
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The present invention is directed to reduction of operation amount of likelihood calculation (LLR calculation) in a communication apparatus for performing communications using an extended mapping in which a plurality of bit sequences are assigned to a single symbol point. A receiving unit receives a signal which is transmitted from a transmitting unit by using the extended mapping. A repetition process unit decodes the received signal from the receiving unit by calculating an LLR of the received signal and performing a repetition process. In this case, the LLR is calculated for every bit using a MAX-LOG approximation and a thus-derived approximation formula is multiplied by weighting factors corresponding to proportions of “0” and “1” in each bit assigned to a symbol point closest to the received signal.
First claim
Opening claim text (preview).
What is claimed is: 1. A communication apparatus for performing communications using an extended mapping in which a plurality of bit sequences are assigned to a single symbol point, the communication apparatus comprising: a receiving unit configured to receive a signal which is transmitted from a transmitting unit using the extended mapping; and a repetition process unit configured to decode the received signal from the receiving unit by calculating a log likelihood ratio (LLR)…
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Electricity · mapped topic
- H03M13/25Primary
Electricity · mapped topic
- H04L1/0054Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8958505B2 cover?
- The present invention is directed to reduction of operation amount of likelihood calculation (LLR calculation) in a communication apparatus for performing communications using an extended mapping in which a plurality of bit sequences are assigned to a single symbol point. A receiving unit receives a signal which is transmitted from a transmitting unit by using the extended mapping. A repetition…
- Who is the assignee on this patent?
- Hitachi Int Electric Inc
- What technology area does this patent fall under?
- Primary CPC classification H03M13/25. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).