Image sensor assembly
US-2024250099-A1 · Jul 25, 2024 · US
Circuit board, image forming apparatus, and method of managing reuse information of circuit board
US8957697B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8957697-B2 |
| Application number | US-201213413742-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 7, 2012 |
| Priority date | Mar 18, 2011 |
| Publication date | Feb 17, 2015 |
| Grant date | Feb 17, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A circuit board includes a main part on which a processor is mounted, a cut part to be cut off from the main part at a cut section before the board is reused, and a conductor pattern wired through the cut part via the cut section and to be cut off into a plurality of patterns at the cut section as the cut part is cut off. The processor detects a difference in signal level between a level of a signal output from the conductor pattern before the cut part is cut off, and a level of the signal output from the conductor pattern after the cut part is cut off, to determine a number of times the board is reused.
First claim
Opening claim text (preview).
What is claimed is: 1. A circuit board, comprising: a main part on which a processor is mounted; a cut part to be cut off from the main part at a cut section before the board is reused; and a conductor pattern wired through the cut part via the cut section and to be cut off into a plurality of patterns at the cut section as the cut part is cut off, wherein, when electric power is supplied, the processor detects a difference in signal level between a level of a signal output…
Assignees
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Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H05K1/0268Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8957697B2 cover?
- A circuit board includes a main part on which a processor is mounted, a cut part to be cut off from the main part at a cut section before the board is reused, and a conductor pattern wired through the cut part via the cut section and to be cut off into a plurality of patterns at the cut section as the cut part is cut off. The processor detects a difference in signal level between a level of a s…
- Who is the assignee on this patent?
- Ueda Yuichiro, Orikasa Noriaki, Nishizawa Takashi, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H05K1/0268. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).