Method for positioning semiconductor devices and corresponding positioning apparatus
US-2024329125-A1 · Oct 3, 2024 · US
IC device testing socket
US8957693B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8957693-B2 |
| Application number | US-201013497132-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 21, 2010 |
| Priority date | Sep 29, 2009 |
| Publication date | Feb 17, 2015 |
| Grant date | Feb 17, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
To provide an IC device testing socket, capable of improving signal transmission efficiency during testing an IC device, without deteriorating the replacement workability of contact pins. A substrate 2 has dielectric layers 22 - 25 embedded in a base material 21 constituted by dielectric material such as glass epoxy. Each dielectric layer has a conductive layer, such as copper, formed on both sides thereof. Each of contact pins 3 extends generally perpendicular to surfaces 26 and 27 of substrate 2 , and penetrates substrate 2 . A through hole 28 , into which each contact pin may be pressed, is formed in base material 21 of substrate 2 , each high-dielectric layer and conductive layer. A conductive material 281 , such as copper, is formed on an inner surface of each through hole 28.
First claim
Opening claim text (preview).
What is claimed is: 1. An IC device testing socket comprising: a substrate; and a plurality of conductive contact pins, each frictionally held in a through hole in the substrate, wherein the substrate comprises: a base material; at least one dielectric layer stacked on the base material, the at least one dielectric layer having a dielectric constant higher than that of the base material; and conductive layers stacked on the base material and provided on both sides of the…
Assignees
Inventors
Classifications
Electricity · mapped topic
Physics · mapped topic
- G01R1/0483Primary
Physics · mapped topic
- G01R31/26Primary
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US8957693B2 cover?
- To provide an IC device testing socket, capable of improving signal transmission efficiency during testing an IC device, without deteriorating the replacement workability of contact pins. A substrate 2 has dielectric layers 22 - 25 embedded in a base material 21 constituted by dielectric material such as glass epoxy. Each dielectric layer has a conductive layer, such as copper, formed on …
- Who is the assignee on this patent?
- Tsubaki Yuichi, 3M Innovative Properties Co
- What technology area does this patent fall under?
- Primary CPC classification G01R1/0483. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Feb 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).