Laminate stacked capacitor, circuit substrate with laminate stacked capacitor and semiconductor apparatus with laminate stacked capacitor

US8957499B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8957499-B2
Application numberUS-201113228091-A
CountryUS
Kind codeB2
Filing dateSep 8, 2011
Priority dateSep 10, 2010
Publication dateFeb 17, 2015
Grant dateFeb 17, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method of manufacturing a capacitor includes forming a first ceramic film on a first base made of a metal, forming a second ceramic film on a second base made of a metal, forming a first copper electrode pattern and a first copper via-plug on a surface of one of the first and second ceramic films, the electrode pattern and the via-plug being separate from each other, bonding the first and second ceramic films together with the first electrode pattern and the via-plug therebetween, by applying a pulsed voltage between the first base and the second base while the first base and the second base are pressed so that the first ceramic film and the second ceramic film are pressed on each other, and removing the second base.

First claim

Opening claim text (preview).

What is claimed is: 1. A capacitor, comprising: a metal base; a plurality of capacitor dielectric layers made of a ceramic and disposed on top of one another on the base, the capacitor dielectric layers including: a first capacitor dielectric layer, a second capacitor dielectric layer adjacent to the first capacitor dielectric layer, and a third capacitor dielectric layer adjacent to the second capacitor dielectric layer at the opposite side to the first capacitor dielectri…

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Next steps

Free tools are coming soon. Tell us what you want to track and we'll notify you.

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US8957499B2 cover?
A method of manufacturing a capacitor includes forming a first ceramic film on a first base made of a metal, forming a second ceramic film on a second base made of a metal, forming a first copper electrode pattern and a first copper via-plug on a surface of one of the first and second ceramic films, the electrode pattern and the via-plug being separate from each other, bonding the first and sec…
Who is the assignee on this patent?
Imanaka Yoshihiko, Amada Hideyuki, Kumasaka Fumiaki, and 1 more
What technology area does this patent fall under?
Primary CPC classification H01G4/308. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).