Semiconductor structure and method for manufacturing the same

US8957481B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8957481-B2
Application numberUS-201113379407-A
CountryUS
Kind codeB2
Filing dateMay 11, 2011
Priority dateSep 30, 2010
Publication dateFeb 17, 2015
Grant dateFeb 17, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present application discloses a semiconductor structure and a method for manufacturing the same. Compared with conventional approaches to form contacts, the present disclosure reduces contact resistance and avoids a short circuit between a gate and contact plugs, while simplifying manufacturing process, increasing integration density, and lowering manufacture cost. According to the manufacturing method of the present disclosure, second shallow trench isolations are formed with an upper surface higher than an upper surface of the source/drain regions. Regions defined by sidewall spacers of the gate, sidewall spacers of the second shallow trench isolations, and the upper surface of the source/drain regions are formed as contact holes. The contacts are formed by filling the contact holes with a conductive material. The method omits the steps of etching for providing the contact holes, which lowers manufacture cost. By forming the contacts self-aligned with the gate, the method avoids misalignment and improves performance of the device while reducing a footprint of the device and lowering manufacture cost of the device.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor structure, comprising: a semiconductor substrate; at least one gate formed on the semiconductor substrate; sidewall spacers adjacent to the gate; source/drain regions on both sides of the gate; contacts formed on the source/drain regions; first shallow trench isolations which are embedded in the semiconductor substrate and have a length direction parallel to that of the gate; and second shallow trench isolations which are se…

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Frequently asked questions

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What does patent US8957481B2 cover?
The present application discloses a semiconductor structure and a method for manufacturing the same. Compared with conventional approaches to form contacts, the present disclosure reduces contact resistance and avoids a short circuit between a gate and contact plugs, while simplifying manufacturing process, increasing integration density, and lowering manufacture cost. According to the manufact…
Who is the assignee on this patent?
Zhu Huilong, Zhong Huicai, Yin Haizhou, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10P50/695. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).