Semiconductor device comprising both amorphous and crystalline semiconductor oxide

Patent metadata

Field	Value
Publication number	US-8957414-B2
Application number	US-201213399375-A
Country	US
Kind code	B2
Filing date	Feb 17, 2012
Priority date	Dec 4, 2009
Publication date	Feb 17, 2015
Grant date	Feb 17, 2015

Abstract

A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.

First claim

What is claimed is:

1. A semiconductor device comprising:
a gate electrode;
a gate insulating film over the gate electrode;
an oxide semiconductor layer over the gate insulating film;
a source electrode and a drain electrode over the oxide semiconductor layer; and
an insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode,
wherein a portion of the oxide semiconductor layer located between the source electrode and the drain electrode is thinner than portions of the oxide semiconductor layer below the source electrode and the drain electrode,
wherein the portion of the oxide semiconductor layer located between the source electrode and the drain electrode includes a crystal region,
wherein a c axis of the crystal region is aligned in a direction which is substantially perpendicular to a top surface of the oxide semiconductor layer, and
wherein the oxide semiconductor layer includes indium, gallium, and zinc.

2. The semiconductor device according to claim 1 ,
wherein the crystal region is formed in a superficial portion of the oxide semiconductor layer.

3. The semiconductor device according to claim 1 , further comprising an amorphous oxide semiconductor layer interposed between the gate insulating film and the oxide semiconductor layer.

4. The semiconductor device according to claim 2 , wherein the superficial portion reaches to a distance from the top surface of one half or more of a thickness of the oxide semiconductor layer.

5. A semiconductor device comprising:
a gate electrode;
a gate insulating film over the gate electrode;
an oxide semiconductor layer over the gate insulating film, the oxide semiconductor layer including a first crystal region, a second crystal region, and a third crystal region;
a source electrode and a drain electrode over the oxide semiconductor layer; and
an insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode,
wherein the first crystal region is overlapped with the source electrode,
wherein the second crystal region is overlapped with the drain electrode,
wherein the third crystal region is located between the source electrode and the drain electrode and is not overlapped with the source electrode and the drain electrode,
wherein a thickness of the third crystal region is thinner than that of the second crystal region and the first crystal region,
wherein a c axis of at least one of the first crystal region, the second crystal region, and the third crystal region is aligned in a direction which is substantially perpendicular to a top surface of the oxide semiconductor layer, and
wherein the oxide semiconductor layer includes indium, gallium, and zinc.

6. The semiconductor device according to claim 5 ,
wherein the first crystal region is formed in a superficial portion of the oxide semiconductor layer.

7. The semiconductor device according to claim 5 , further comprising an amorphous oxide semiconductor layer interposed between the gate insulating film and the oxide semiconductor layer.

8. The semiconductor device according to claim 6 , wherein the superficial portion reaches to a distance from the top surface of one half or more of a thickness of the oxide semiconductor layer.

9. A semiconductor device comprising:
a gate electrode;
a gate insulating film over the gate electrode;
an oxide semiconductor layer over the gate insulating film, the oxide semiconductor layer comprising a first region and a second region;
a source electrode and a drain electrode over the oxide semiconductor layer; and
an insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode,
wherein the first region is located between the gate insulating film and the second region,
wherein the first region comprises an amorphous structure and the second region comprises a crystal structure,
wherein crystallinity of the second region is higher than that of the first region,
wherein a portion of the oxide semiconductor layer located between the source electrode and the drain electrode is thinner than portions of the oxide semiconductor layer below the source electrode and the drain electrode,
wherein the portion of the oxide semiconductor layer located between the source electrode and the drain electrode includes the second region,
wherein a c axis of the second region is aligned in a direction which is substantially perpendicular to a top surface of the oxide semiconductor layer, and
wherein the oxide semiconductor layer includes indium, gallium, and zinc.

10. The semiconductor device according to claim 9 ,
wherein the second region is formed in a superficial portion of the oxide semiconductor layer.

11. The semiconductor device according to claim 10 , wherein the superficial portion reaches to a distance from the top surface of one half or more of a thickness of the oxide semiconductor layer.

12. A semiconductor device comprising:
a gate electrode;
a gate insulating film over the gate electrode;
an oxide semiconductor layer over the gate insulating film, the oxide semiconductor layer comprising a first region and a second region;
a source electrode and a drain electrode over the oxide semiconductor layer; and
an insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode,
wherein the first region is located between the gate insulating film and the second region,
wherein the first region comprises a nanocrystal and the second region comprises a crystal structure,
wherein a portion of the oxide semiconductor layer located between the source electrode and the drain electrode is thinner than portions of the oxide semiconductor layer below the source electrode and the drain electrode,
wherein the portion of the oxide semiconductor layer located between the source electrode and the drain electrode includes the second region,
wherein a c-axis of the crystal structure is aligned in a direction which is substantially perpendicular to a top surface of the oxide semiconductor layer, and
wherein the oxide semiconductor layer includes indium, gallium, and zinc.

13. The semiconductor device according to claim 12 ,
wherein the second region is formed in a superficial portion of the oxide semiconductor layer.

14. The semiconductor device according to claim 13 , wherein the superficial portion reaches to a distance from the top surface of one half or more of a thickness of the oxide semiconductor layer.

15. A semiconductor device comprising:
a gate electrode;
a gate insulating film over the gate electrode;
an oxide semiconductor layer over the gate insulating film, the oxide semiconductor layer comprising a first region and a second region;
a source electrode and a drain electrode over the oxide semiconductor layer; and
an insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode,
wherein the first region is located between the gate insulating film and the second region,
wherein the first region comprises an amorphous region and a nanocrystal, and the second region comprises a crystal structure,
wherein a portion of the oxide semiconductor layer located between the source electrode and the drain electrode is thinner than portions of the oxide semiconductor layer below the source electrode and the drain electrode,
wherein the portion of the oxide semiconductor layer located between the source electrode and the drain electrode includes the second region,
wherein a c-axis of the crystal structure is aligned in a direction which is substantially perpendicular to a

Assignees

• Yamazaki Shunpei
• Sakata Junichiro
• Ohara Hiroki
• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Sakata Junichiro
• Ohara Hiroki

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10D64/01338

  with a treatment, e.g. annealing, after the formation of the conductor · CPC title

• H10P95/70

  Chemical treatments · CPC title

• H10P52/00

  Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title