Method of manufacturing semiconductor device

US8952378B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8952378-B2
Application numberUS-201213570517-A
CountryUS
Kind codeB2
Filing dateAug 9, 2012
Priority dateJul 17, 2009
Publication dateFeb 10, 2015
Grant dateFeb 10, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object is to provide a method for manufacturing a highly reliable semiconductor device including a transistor with stable electric characteristics. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode over a substrate having an insulating surface; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film over the gate insulating film; irradiating the oxide semiconductor film with an electromagnetic wave such as a microwave or a high frequency; forming a source electrode and a drain electrode over the oxide semiconductor film irradiated with the electromagnetic wave; and forming an oxide insulating film, which is in contact with part of the oxide semiconductor film, over the gate insulating film, the oxide semiconductor film, the source electrode, and the drain electrode.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of manufacturing a semiconductor device, the method comprising the steps of: forming a gate electrode over a substrate; forming a gate insulating film over the gate electrode; forming a source electrode and a drain electrode over the gate insulating film; and forming an oxide semiconductor film over the gate insulating film, the source electrode and the drain electrode by chemical vapor deposition; and forming a highly purified oxide semiconductor by irradiating the oxide semiconductor film with a microwave having a frequency greater than or equal to 300 MHz and less than or equal to 3 THz under an inert gas atmosphere or reduced pressure, or in air where a dew point under atmospheric pressure is −60° C. or lower to give energy to a polar molecule included in the oxide semiconductor film, so that the polar molecule is evaporated, wherein the highly purified oxide semiconductor is overlapped with the gate electrode, wherein the highly purified oxide semiconductor is partly overlapped with the source electrode and the drain electrode, and wherein the highly purified oxide semiconductor is an intrinsic semiconductor or a substantially intrinsic semiconductor. 2. A semiconductor device comprising: a substrate; a gate electrode over the substrate; a gate insulating film over the gate electrode; a source electrode and a drain electrode over the gate insulating film; and an oxide semiconductor film over the gate insulating film, the source electrode and the drain electrode, wherein the oxide semiconductor film is overlapped with the gate electrode, wherein the oxide semiconductor film is partly overlapped with the source electrode and the drain electrode, wherein the oxide semiconductor film comprises a highly purified oxide semiconductor, wherein the highly purified oxide semiconductor is an intrinsic semiconductor or a substantially intrinsic semiconductor, and wherein concentration of hydrogen in the highly purified oxide semiconductor measured by secondary ion mass spectrometry is less than 5×10 19 /cm 3 . 3. The semiconductor device according to claim 2 , wherein the highly purified oxide semiconductor comprises a material represented by InMO 3 (ZnO) m (m>0), and each include, as the M, one or more metal elements selected from gallium (Ga), aluminum (Al), manganese (Mn), and cobalt (Co). 4. The semiconductor device according to claim 2 further comprising an oxide insulating film over and in contact with the oxide semiconductor film. 5. The semiconductor device according to claim 2 , wherein the highly purified oxide semiconductor comprises an In—Ga—Zn—O—based oxide semiconductor or an In—Zn—O—based oxide semiconductor. 6. The semiconductor device according to claim 2 , wherein the highly purified oxide semiconductor is formed by desorption of moisture, hydrogen, or OH from the oxide semiconductor film. 7. The semiconductor device according to claim 2 , wherein the highly purified oxide semiconductor is formed by irradiating the oxide semiconductor film with a microwave so that moisture, hydrogen, or OH is desorbed from the oxide semiconductor film. 8. The semiconductor device according to claim 7 , wherein frequency of the microwave is greater than or equal to 300 MHz and less than or equal to 3 THz. 9. The semiconductor device according to claim 2 further comprising: an electrode electrically connected to one of the source electrode and the drain electrode; and a display element including the electrode. 10. A semiconductor device comprising: a substrate; a gate electrode over the substrate; a gate insulating film over the gate electrode; a first oxide semiconductor film over the gate insulating film; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode over the second oxide semiconductor film; and wherein the first oxide semiconductor film is overlapped with the gate electrode, wherein the first oxide semiconductor film is partly overlapped with the source electrode and the drain electrode, wherein the first oxide semiconductor film comprises a highly purified oxide semiconductor, wherein the highly purified oxide semiconductor is an intrinsic semiconductor or a substantially intrinsic semiconductor, and wherein concentration of hydrogen in the highly purified oxide semiconductor measured by secondary ion mass spectrometry is less than 5×10 19 /cm 3 . 11. The semiconductor device according to claim 10 , wherein the highly purified oxide semiconductor comprises a material represented by InMO 3 (ZnO) m (m>0), and each include, as the M, one or more metal elements selected from gallium (Ga), aluminum (Al), manganese (Mn), and cobalt (Co). 12. The semiconductor device according to claim 10 , wherein the highly purified oxide semiconductor comprises an In—Ga—Zn—O-based oxide semiconductor or an In—Zn—O—based oxide semiconductor. 13. The semiconductor device according to claim 10 further comprising: an electrode electrically connected to one of the source electrode and the drain electrode; and a display element including the electrode. 14. The semiconductor device according to claim 10 , wherein the second oxide semiconductor film comprises an n-type impurity region. 15. The semiconductor device according to claim 10 further comprising a layer over the first oxide semiconductor film, wherein the layer overlaps the gate electrode, and wherein an end portion of the layer is provided between the first oxide semiconductor film and at least one of the source electrode and the drain electrode. 16. The semiconductor device according to claim 15 , wherein the layer comprises an inorganic material including oxygen. 17. The semiconductor device according to claim 10 , wherein the second oxide semiconductor film comprises nanocrystal in an amorphous structure.

Assignees

Inventors

Classifications

  • of thin-film transistors [TFT] · CPC title

  • Subject matter not provided for in other groups of this subclass · CPC title

  • H10D86/423Primary

    comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

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What does patent US8952378B2 cover?
An object is to provide a method for manufacturing a highly reliable semiconductor device including a transistor with stable electric characteristics. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode over a substrate having an insulating surface; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film over the …
Who is the assignee on this patent?
Miyanaga Akiharu, Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/423. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).