Modeling multi-patterning variability with statistical timing

Patent metadata

Field	Value
Publication number	US-8949765-B2
Application number	US-201314139004-A
Country	US
Kind code	B2
Filing date	Dec 23, 2013
Priority date	Oct 31, 2012
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

Systems and methods for modeling multi-patterning variability with statistical timing analysis during IC fabrication are described. The method may be provided implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions operable to define at least one source of variation in an integrated circuit design. The programming instructions further operable to model the at least one source of variation for at least two patterns in at least one level of the integrated circuit design as at least two sources of variability respectively.

First claim

What is claimed is:

1. A method for optimizing a design layout of an integrated circuit, the method comprising:
querying fabrication measurements associated with at least one source of variation for at least two patterns in at least one level of the integrated circuit design;
determining from the fabrication measurements if a distribution has shifted based upon a currently applied distribution;
asserting canonical shift and/or scale to random variables to model a difference in…

Assignees

• IBM

Inventors

• Buck Nathan
• Dreibelbis Brian
• Dubuque John P
• Foreman Eric A
• Habitz Peter A
• Hathaway David J
• Hemmett Jeffrey G
• Venkateswaran Natesan
• Visweswariah Chandramouli
• Zolotov Vladimir

Classifications

• G06F2111/06

  Physics · mapped topic

• G06F2119/12

  Physics · mapped topic

• G06F30/398 Primary

  Physics · mapped topic

• G06F30/392

  Physics · mapped topic

• G06F2111/08

  Physics · mapped topic