Integrated physical coding sublayer and forward error correction in networking applications
US-2015381312-A1 · Dec 31, 2015 · US
US8949696B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8949696-B2 |
| Application number | US-201313770030-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 19, 2013 |
| Priority date | Feb 19, 2013 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding including utilization of different scaling values on a portion by portion basis during the data decoding.
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What is claimed is: 1. A data processing system, the data processing system comprising: a data decoder circuit operable to apply a data decode algorithm to a decoder input to yield a decoded output, wherein the decoder input includes at least a first portion and a second portion; and wherein applying the data decoding algorithm to the decoder input includes: determining a first condition associated with the first portion; determining a second condition associated with the sec…
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