Multi-core processor including a monitored processor core whose process result is to be monitored by a number of processors based on processing load

Patent metadata

Field	Value
Publication number	US-8949663-B2
Application number	US-201113517139-A
Country	US
Kind code	B2
Filing date	Dec 13, 2011
Priority date	Dec 13, 2011
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

A multi-core processor includes a monitored processor core whose process result is to be monitored; a monitoring processor core group including two or more monitoring processors which can perform a process for monitoring the monitored processor core; an evaluating part configured to evaluate a processing load of the monitoring processor core group; and a controlling part configured to make the monitoring processor core group perform the process for monitoring the monitored processor core in a distributed manner if the processing load of the monitoring processor core group evaluated by the evaluating part is low, and make the monitoring processor of the monitoring processor core group perform the process for monitoring the monitored processor core if the processing load of the monitoring processor core group evaluated by the evaluating part is high, the monitoring processor performing a process whose priority is relatively low.

First claim

The invention claimed is:

1. A multi-core processor, comprising:
a monitored processor core whose process result is to be monitored;
a monitoring processor core group including two or more monitoring processors which can perform a process for monitoring the monitored processor core;
an evaluating part configured to evaluate a processing load of the monitoring processor core group; and
a controlling part configured to make the monitoring processor core group perform the process for monitoring the monitored processor core in a distributed manner if the processing load of the monitoring processor core group evaluated by the evaluating part is low, and make only one monitoring processor of the monitoring processor core group perform the process for monitoring the monitored processor core if the processing load of the monitoring processor core group evaluated by the evaluating part is high, the monitoring processor performing a process whose priority is relatively low.

2. The multi-core processor of claim 1 , wherein
the controlling part makes the monitoring processor of the monitoring processor core group perform the process for monitoring the monitored processor core if the processing load of the monitoring processor core group evaluated by the evaluating part is high, the monitoring processor performing a process whose priority is the lowest available.

3. The multi-core processor of claim 1 , wherein
the evaluating part evaluates the processing load of the monitoring processor core group such that the processing load becomes high if an average value of CPU usage percentages in the monitoring processor core group exceeds a reference value.

4. The multi-core processor of claim 1 , wherein
the process for monitoring the monitored processor core includes performing the same process as the monitored processor core and comparing a result of the process with the process result of the monitored processor core.

Assignees

• Ueda Koji
• Toyota Motor Co Ltd

Inventors

• Ueda Koji

Classifications

• G06F9/5083 Primary

  Techniques for rebalancing the load in a distributed system · CPC title

• G06F11/1637

  using additional compare functionality in one or some but not all of the redundant processing components · CPC title